Semiconductor processing often requires spacers for ion implantation. Spacers have been used in process steps, such as transistor lightly-doped drain (LDD) formation and source/drain implantation. LDDs are utilized to reduce hot electron effects in MOS devices. These structures absorb some of the potential in the drain and reduce the resulting electric field. Reducing the electric field also reduces hot electron-induced gate currents, increasing device stability.
In the past, nitride and oxide materials have been utilized for LDD fabrication spacers. Two source/drain implantations are done after formation of a gate. Source/drain regions immediately adjacent to the gate are lightly-doped, and source/drain regions farther from the gate are heavily-doped. Spacers are formed alongside the gate after a light source/drain implantation. Then, a second ion implantation forms heavily-doped regions within the already implanted source/drain regions, farther from the gate. However, spacers can be formed prior to the light source/drain implantation. Then, the source/drain region is heavily-doped with an implantation adjacent to the spacers. Subsequently, the spacers are removed and a lightly-doped implant region is formed adjacent to the gate.
Oxide spacers are often utilized in the formation of self-aligned source/drain regions in metal-oxide-semiconductor (MOS) devices. Self-aligned source/drain silicide (salicide) films are utilized to decrease circuit resistance in devices. As devices shrink, circuit resistance increases. Furthermore, sheet resistivity of shallow-junctions of source/drain regions also increases. Therefore, saliciding processes attempt to overcome this increased resistance. Spacers are formed alongside the gate after source/drain implantation. Then, a refractory metal silicide is formed alongside the spacers. Silicide can be formed in a variety of ways, such as by depositing a layer of refractory metal and annealing, or depositing a refractory metal silicide. Subsequent contacts to the silicided source/drain regions have decreased resistance throughout the contact area,
The common process flow to form a spacer is first to deposit a conformal film, like oxide or nitride, followed by a dry etch. Due to the dry etch process step, the silicon substrate and gate oxide integrity may be degraded. As a result, damaged layers will etch at a faster rate, undesirably altering the thickness of the layers. Another limitation of using oxide or nitride for spacer material is that such layers are often deposited using a high temperature deposition step, which may cause undesirable dopant migration, reflow at undesired times, or other unwanted effects in surrounding device areas. Another problem with using oxide and nitride films for spacer material is that they may not always be removed after the implantation step. Ions implanted into such layers diffuse during subsequent thermal process steps. Thus, if such layers are not of adequate thicknesses, it is hard to control the diffusion of unwanted impurities into device regions masked by the spacers.
There is a need for a spacer material which does not subject surrounding device regions to implantation damage or damage caused by dry etching to form the spacer, as in the case of oxides and nitrides. There is a need for a spacer, which is easy to define on a substrate without the need for precise masking steps. There is a further need for a spacer material that does not require high temperature deposition and is easily removed after its use.